Tobie: Whatever led you to try stopping the clock? I'm curious what your thinking was. Bob Ammerman RAm Systems (contract development of high performance, high function, low-level software) ----- Original Message ----- From: Tobie Horswill To: Sent: Tuesday, September 19, 2000 11:08 PM Subject: Re: [PIC] : SPI doing a right-shift ? > I tried all 4 possible combinations of clock idle state (CKP) and clock > edge (CKE) and the result is either the same (16 bit data appears right > shifted) or worse (data is garbled). > > One thing I did find out is that if I pause the PIC by removing the crystal > and inserting it back again the right-shift disapears!!! As if the PIC > inherited a faulty state after doing a power up that, somehow, get's fixed > when the clock is stopped/restarted ?!?!? What could possibly be affected in > the PIC by simply pausing CLKin ? > > Obviously, the PIC's hw SPI can indeed read more than 8 consecutive bits so > what's causing this ? > > Tobie > > > ----- Original Message ----- > From: "Oliver Broad" > To: > Sent: Tuesday, September 19, 2000 3:57 PM > Subject: Re: [PIC] : SPI doing a right-shift ? > > > > I wonder if an extra clock transition is being detected before the first > > byte is sent. This causes the remaining bits to be shifted right. One > cause > > is incorrect clock polarity. I'm not sure about true SPI, my experience > was > > mostly with microwire and worse. Example would be: > > Clock idles high. Transmission begins, clock driven low, then MSB output > on > > data then a pulse on clock then next bit and so on. If circuit triggered > on > > the falling edge it would consistantly go off 1 bit early, inserting a > false > > MSB, looking like a right shift. > > > > Oliver. > > -- > http://www.piclist.com hint: PICList Posts must start with ONE topic: > "[PIC]:" PIC only "[EE]:" engineering "[OT]:" off topic "[AD]:" ad's > > -- http://www.piclist.com hint: The list server can filter out subtopics (like ads or off topics) for you. See http://www.piclist.com/#topics