Dan Michaels <oricom@LYNX.SNI.NET> wrote:
> Scott wrote:
> .........
> >
> >I think the level of "determinism" needs to be defined. In many
applications, a
> >timer interrupt can be used to trigger events that can then be process=
ed
by
> >high-level C-code. I had an application like this to control a bank of=
 64
> relays
> >once. It just didn't need to be deterministic to the microsecond, 10's=
 of
> >milliseconds was good enough. That was written in C. If you need 10's =
of
> >microseconds of resolution, then you'd be hard pressed to get determin=
ism
> out of
> >C-compiler. You'd have to either resort to inline assembly and/or care=
ful
tune
> >the way C-code is written.
> >
> =

> Yeah, I think this is the answer. PIC and Scenix have been marketed
> as having deterministic timing, in the sense that you could know
> "exactly" how many cycles both your code and your interrupts will
> take. This is converse to the std CISC processors, where the same
> instruction can take vastly different #cycles, depending upon the
> arguments and addressing modes.
> =

> With C, I think, you can only a priori "code" deterministic timing
> if you know **exactly** how many asm instructions a C instruction
> will compile into - which is probably much more trouble than is
> worth thinking about.
> =

> Even if you can read the asm produced by the C, all you know is
> what the compiler gave you, and you are not necessarily in
> control of the output - plus you have to read the asm to tell
> what you have anyways.
> =

> Trying to fine-tune the C to get the "desired" asm output sounds
> like a losing proposition, for several reasons. And obviously,
> using inline asm to get determinism is not coding in C.
> =

> C =3D determinism =3D I doubt it [polite form of NO!]
> =

> best regards,
> - danM
> =

> --
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I know this is somewhat off topic related to the original thread, but som=
e
clarification is necessary.

While PIC may be marketed as such, Scenix is the only truly
deterministic 8-bit architecture. Determinism not only applies to fixed
cycle length for a given instruction, but also a fixed interrupt response=

time. While PIC may have the former, it's architecture has a variable
interrupt response, depending on what executing instruction was interrupt=
ed.

Scenix has a fixed (3 cycle to internal sources or 5 cycle to external =

sources) interrupt response. Because of this, a hardware timer can provid=
e a
reliable timebase to any code running within the ISR - this is critical t=
o the
whole concept of 'Virtual Peripherals', and true determinism is fundament=
al to
the concept even being possible.

Stephen



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