Yes, the 18C is a 16-bit core. However remember that it is Harvard architecture and so there is no relationship between program memory (a 16-bit bus) and data memory (a complete separate 8-bit bus). Program memory is byte addressable to simplify access using the TBLRD and TBLWR instructions. Bob Ammerman RAm Systems (contract development of high performance, high function, low-level sofftware) ----- Original Message ----- From: Andy Jancura To: Sent: Thursday, August 17, 2000 7:31 AM Subject: Re: [PIC]: Help! PIC18C452 > > > >Second Error: But the ICE debugger does not even goto 0000E or > > > >0001C! The PCL just keeps going from 00000 to 00002 to 00004 to > > > >00006 etc. > > > > > > Isn't this be a 16-bit core??? > > > >Yes,,,, What is your point? > > Hi Thomas, > > excuse me please, my english is at the moment my third language and is not > so ofteen used as german or russian. I forget sometimes some words, like > yesterday happens. The right question I wanted write: > > Isn't this like on a 16-bit core??? > > And I thought following: 18C can address 8bit variables in RAM and Program > memory, but has 16 bit wide word instructions. The only way to realize this > two features is to ignore always the bit 0 in address when instruction read > or jump should occurs. All this is written on P.38 in 18Cxx2.pdf and again > pointed out in application note Migrating from 16Cxxx to 18Cxxx, Goto's and > Call's example. > > In similar way works 68000 too. It has signals for high and low part of word > cell. > > > Andrej > ________________________________________________________________________ > Get Your Private, Free E-mail from MSN Hotmail at http://www.hotmail.com > > -- > http://www.piclist.com hint: To leave the PICList > mailto:piclist-unsubscribe-request@mitvma.mit.edu -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu