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See below:




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  |Bob Ammerman <RAMMERMAN@PRODIGY.NET>                                    |
  |06/07/2000 12:59                                                        |
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Please respond to pic microcontroller discussion list <PICLIST@MITVMA.MIT.EDU>

To:   PICLIST@MITVMA.MIT.EDU
cc:    (bcc: Dan Lloyd/GBPTD/ABB)
Subject:  Re: [EE]: Do any common I2C slaves use clock stretching?

Security Level:?         Internal



I don't know if any chips do stretch the clock. But your hardware is
probably not in as bad a state as you think. You may need to add a pullup
resistor, but you can get the effect of an open drain by tristating the
output when you are not driving the clock. (ie: always leave the clock
output latch low, and use the TRIS bit to operate the clock instead of the
data bit).


> The only device that I know of implementing the clock stretch is the PIC. It's
definately a good idea to use pull ups and to tri-state via TRIS; nice and safe.
The only problem with tri-stating comes when you use the 12C5xx where you cannot
get proper access to the TRIS register (as discussed a little while back) - it
means you have to 'shadow' the register for read-modify-write ops.

There's my thruppenny bits worth.

Dan

PS: Any UK residents: please support the forecourt boycott of buying fuel on
August 1st. Unless you think that taxation of 61% for petrol is acceptable, that
is.


Bob Ammerman
RAm Systems
(high performance, high function, low-level software)

----- Original Message -----
From: Ian Chapman <pic@CHAPMIP.DEMON.CO.UK>
To: <PICLIST@MITVMA.MIT.EDU>
Sent: Thursday, July 06, 2000 7:49 AM
Subject: [EE]: Do any common I2C slaves use clock stretching?


> I've been successfully using "bit-banging" I2C master routines with I2C
> RAMs, EEPROMs and other Philips chips without making any allowance for
> the slave applying "clock stretching" (i.e. holding SCL low to give it
> time to synchronise with the master).
>
> My assumption has been that, if the block diagram in the data sheet of a
> slave device does *not* show any means of pulling SCL low (i.e. SCL is
> just an input) then it cannot implement clock stretching.  However, I
> haven't yet found any examples of data sheets which *do* show this, so
> I'm wondering whether my assumption is valid.
>
> Are there any common I2C slaves which *do* apply clock stretching?
>
> (BTW, if there are, then my hardware design has a problem as I use a
> *non* open-drain PIC output to drive SCL!)
>
> Thanks in advance for any pointers.
> --
> Ian Chapman
> <pic@chapmip.demon.co.uk>
>
> --
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--0__=rUYvN8Ryyij4uGT9kzZoOfV9zEKiPyESxHV3eHfVo3toaGb1W2ngo8z2
Content-type: application/octet-stream;
        name="pic09389.pcx"
Content-Disposition: attachment; filename="pic09389.pcx"
Content-transfer-encoding: base64

CgUBCAAAAABBADEAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
AAAAAAAAAAABQgABAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
AAAAAAAAAAAAAAAAAAA=

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