I've a circuit that's complete apart from one small section.

What's the best way to -

a) change the output of a flip-flop with the first falling edge of a
     pulse train and then ignore any further pulses so that
b) the f-f output stays stable until reset by a falling edge from a
    different part of the circuit ?

This is to direct a train of pulses to a RAM for a time until a counter
reaches a certain value. In this case, when a8 goes low (after a
previous 1/2-time low, 1/2-time high pattern), direction should stop

So far I've got a 74HC74 D-type f-f with

CP and D permanently pulled high
S as the input, falling edge triggered
R as the "stop" and "reset"

Now, the falling edge of a8 into R as the "stop" input does work
except as the address counter is reset and therefore 0, triggering
can't occur. R has to be high for triggering to happen and, as I just
said, a8 starts low

I've looked over the truth tables for RS, JK, and D f-f, but can't
decide which would be the best to experiment with. TBH, all
the 0's, 1's, R's, S's, J's, K's, T's, D's, clocks, clears and sets
are driving me batty. My brain hurts

I had a circuit that did this, but danged if I know where it is. It also
used a 74HC74, which is why I started with what I did

The plan was to use this a8 falling edge to stop the direction of
pulses, and then have the PIC to apply a short negative pulse to R
(after the a8 falling edge had arrived) to completely reset the f-f. This
part worked OK, with the PIC tri-stated until it saw a8 go down. The
PIC connects directly to R, and a8 to R through a 1k resistor to
separate the two when the PIC is an o/p. It's a fudge I know, but that's
as far I got

So, anyone know what I mean and have an answer ?

TIA