See my notes marked !!!! below Bob Ammerman RAm Systems (high performance, high function, low-level software) ----- Original Message ----- From: K=FCbek Tony To: Sent: Friday, June 30, 2000 5:21 AM Subject: Re: [PIC]: And now for somehting different...the 18xx series. Hi, Thanks to all who responded ! it really hightens my belives in the list :-) Anyway here are some minor replies: Scott Dattalo wrote: >This is certainly an open-ended question! You think ? .. :-) , yes I know but at this time I dont have any specific questions as I'm just starting to mentally adjust to the new features/quirks/etc. In time though I'll probably have some more 'down to the metal' questions. Bob Ammerman wrote: >**** You do have to worry about the 2 word instructions tho'. Those extra >words of memory and cycles can sneak up on you. How so ? you mean that it 'eats code space' or cycles ? or when doing table jumps ? !!!! (d) All of the above >**** You lose the 1 word, 1 cycle MOVFP and MOVPF instructions. Stubmled first, ( I've never heard of these instr. ) but then I realised that there are 'other' PIC's which I havent 'played' with yet. So I'm guessing these are from the 17xx series correct ? !!!! Yep - these are in the 17C chips. They let you move directly from an SFR to/from a GPR >**** There are many neat things that can be done with the accessible >'top-of-stack' registers. Such as ? !!!! See my (very long) post: "Not so stupid 18C tricks". >**** Not any big deal at all! Actually, my coding standard requires >explicitly stating every option on every instruction. Helps preempt the bug >where you forget to specify what you want! My way of coding/thinking ! ( even so I ocasionally misstype the ,W or ,F ;-) ) Harold Hallikainen wrote: >I've moved two designs from the 16c74 to the 18c452 and am now working >on my third. I did it mostly to get more on-chip RAM, but the hardware Likewise and to get rid of the bank switching ( which is evil...) . >use something like movlb high(TxBuf) ). NOTE that the default is to use >BANKED (using the BSR) instead of the access bank. If BSR is set to 0, >this is generally equivalent (though you can't get to the SFR's that >way...). Interesting, I need to read a bit more of what You mean by the BANKED statement, seem that I've missed something going through the manuals. >Finally, watch out for pclatu. This is loaded into the highest 4 bits of >the PC on some instructions (like addwf pcl,1,0). Pclatu is cleared on Is this the same as the 'lower' pic's PCLATH ? i.e. if you dont clear it the next goto could be fun :-) !!!! This is just like PCLATH, but the 18C allow 20-bit program addresses. In reality, for any design under 64K bytes this register is always zero a= nd can be ignored. And thanks to Darrel Johansen, nice to see that Microchip is sometimes listening. !!!! Amen! /Tony Tony K=FCbek, Flintab AB =B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2= =B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2= =B2=B2=B2=B2=B2=B2=B2=B2=B2=B2 E-mail: tony.kubek@flintab.com =B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2= =B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2=B2= =B2=B2=B2=B2=B2=B2=B2=B2=B2=B2