-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 >Or are you indicating that your experience showed that high-Q, >high-dielectric and all other types of capacitors at the same capacitance >value performed the same at all frequencies? No, I didn't test that broad a spread of types, but I would expect each type to show a similar behaviour, if at a different frequency per value. >What did you use for a test circuit? How did you control the effect of >layout inductance? 100 mil tracks over ground plane on 0.062 FR4 (50 ohms-ish) Source on one end of the track, and measuring at the cap. Track length, IIRC an inch or two. >Yes, but these harmonics fall off at 1/f and the capacitor impedance >increases as 1/f from inductance. So to a first approximation the two >effects cancel. The Zl seems pretty small up to a point. >This certainly is true, although you don't mention the fundamental which is >the largest effect. ??? With large resistive loads maybe, but cmos inputs are capacitors, so the gate draws almost no current at the fundamental, unless it's high enough to make the gate C low Z >Oddly, there has been no mention of the performance requirement for this >bypassing, except my comment that the impedance should be < 1 ohm to give < >0.1 V ripple at the clock frequency (to 3rd harmonic, if you wish). No >matter what kind of capacitor is used, you will find it tough to do much >better than 0.1 ohm. Obviously you'd like the Z to be as low as possible. Since you have a Z that varies over F, to a minimum, and goes back up past a certain point, it makes sense to me, to pick the valley to correspond to the highest observed noise (presumably where you need the low Z the most) >If you don't have a testable performance requirement, how do you know when >your design is complete and whether it will work in the application? "must pass part 15" works for me in terms of emi. I don't know if anyone specs anything on logic or processors other than the usual tolerance band around a nominal VCC. Obviously if you're driving such heavy loads that you have observable glitches in VCC that approach the limits, then you need to address that. (reduce load, add bypassing) Still, you should be able to select the best bypass by looking at the width of the glitches. >What would be really nice here is to have some equivalent circuit >parameters for real capacitors of different types in some test circuit >situation. Unfortunately, I have searched in vain for this information from >parts manufacturers. Probably because the parameters vary with the exact >application. I've never seen anything much except for electrolytics. There may be some brands/types of smaller caps that have more complete specs, but not in my inventory :( - -- Are you an ISP? Tired of spam? www.spamwhack.com A pre-emptive strike against spam! Where's Dave? http://www.findu.com/cgi-bin/find.cgi?kc6ete-9 -----BEGIN PGP SIGNATURE----- Version: PGPfreeware 6.5.2 for non-commercial use iQA/AwUBOT9g8oFlGDz1l6VWEQJ1vACgupAq7kKerm8xP6w/Xu5H6+w8+pQAoKV8 eVmAIWZYbw6iER5wGYlHBTkD =W8O8 -----END PGP SIGNATURE-----