Hi Scott.

> > What internal phase (Q1 Q2 Q3 Q4 ???) TMR0 is incremented every cycle. Is it happened
> > in every Q1 (simultaneously with PC increment) or there is another reason to do it
> > during other phases of clocking ?
>
> According to the C64 data sheet, it's during Q4. Look on page 66 of:
>
> http://www.microchip.com/Download/Lit/PICmicro/16C6X/30234d.pdf

Ok. So it means we read _old_ value first then it will be incremented ?

The same clock cycle, Q2 phase we are reading TMR0 value, Q4 phase TMR0 is incremented.
Am I correct ?

WBR Dmitry.