>Just make the Flash sit there and look (to the on-motherboard FDC) like
>it IS a (small) floppy drive.  Add a 4-pin power connector and far as
>the machine knows, it has a write-protected Floppy in the drive.  The
>FDD is a lot dumber, easier to reverse engineer part than the FDC,
>methinks, and FDC's are pretty universal (Also, you don't eat up a
>sometimes non-existent ISA slot - you don't have to deal with PCI -
>etc.)

The problem here is that you need to have the data come out as a serial bit
stream with a properly appended CRC code. the data also needs to be encoded as a
MFM data stream. If the PIC does the parallel -> serial conversion, I suppose it
would be practical to append a couple of bytes of precalculated CRC to the data
sector in the flash, but this would then mean a fancy calculation to find the
start of the next sector.

I was envisioning the PIC having registers for track and sector, and then just
parallel transferring the data to the host, and setting a register to say error
free reading. Voila, no rotational latency. With the serial transfer you would
always have to transfer a full "rotation" of data as you would not know which
sector the host required.