> At 01:08 PM 3/27/00 -0800, Jim wrote: > One point to make with the I2C EEPROMs that has not been > made during this thread is that the 24C01, 24C02, 24C04, 24c08 > and 24C16 DO NOT support multiple eeprom devices on the > one I2C bus. The reason is that the slave addr byte is used as > the upper address byte (even on the 24C00, 24C01 when no upper > address is actually required.) Jim, The MChip 24C01A and the Atmel AT24C01 are not the same. Even the small MChip parts have three address bits that are tied high or low to set the slave address. With these parts, you CAN put 8 EE chips on the bus. Of course for the 24C01 it would be cheaper and probably simpler to use one larger part, but if you needed modularity or redundancy for some reason, it is possible. As you note, the larger Atmel parts (>16K) use the strapped address scheme like the MChip parts, so above 16K, I think they're more compatible. I mostly use the 64K parts myself, where arraying them for larger capacity makes sense. It takes some address translation logic to use several chips as one large area becuase of the need to "increment" the DEVICE address when one rolls from one chip to another. The rest of your points are right on. The page buffer size issue is a pain because its nice to write the largest block possible to improve throughput, but I've had to settle for "least common denominator" write page size to be able to second source. It sounds like you had the same experience. Regards, Barry ------------ Barry King, KA1NLH NRG Systems "Measuring the Wind's Energy" http://www.nrgsystems.com Check out the accumulated (PIC) wisdom of the ages at: PIC/PICList FAQ: http://www.piclist.org