John Fisher wrote:
>While troubleshooting some code tonight I realized that maybe you need to
>disable interrupts while accessing banks 1,2 or 3. I noticed that the
>standard interrupt template saves off 'w' and 'status' in what it expects to
>be bank 0. If I'm using bank 1,2 or 3 this is not cool with unexpected
>results. The whole problem showed up when I started using 'banksel'.
>Eventually I gave up and crammed everything into bank 0. Maybe it's a bank
>switching problem or maybe it's an interrupt problem. But it works now that
>I have given up the other 3 banks. There must be a better way to handle
>things on the '877. If you have to banksel and disable interrupts for every
>access above bank 0, there must be a better way :-)
>
>Regards,
>John
>

Same time zone - in case you are still hammering away [and everyone
else is snoozing], this has been a major bugaboo with PIC since day 2.
First instruction in the ISR is usually

        movwf   w_temp

which always plants the data into the "currently-selected" bank.
Setting STATUS to bank 0, for additional register saves occurs later
in the ISR.

The "usual" solution is to assign < w_temp > to a location that won't
do any harm when it is overwritten, IRREGARDLESS of the bank. In other
words, look at where the < w_temp > offset address resides in banks
0, 1, 2, etc, and realize the ISR doesn't know the difference. Make
sure your important data doesn't reside at that same offset in the
higher banks.

Making < w_temp > the 1st or last RAM location is a common way to
go. Also, due to the way the std ISR is written, < status_temp >
will normally write to bank 0 only.

[I am relating this, being familiar with the older 2nd gen PICs,
but not yet the '87x specifics - which I presume work the same
miserable way. If I am wrong, someone will no doubt correct this
tomorrow].

Hope this makes some sense, it's late, and goodnite,
- Dan Michaels