On Wed, 12 Apr 2000, Walter Banks wrote:

> ----------
> > From: Scott Dattalo <scott@DATTALO.COM>
> > To: PICLIST@MITVMA.MIT.EDU
> > Subject: Re: Question: C vs Asm
> > Date: Wednesday, April 12, 2000 10:24 AM
> >
> > On Wed, 12 Apr 2000, Walter Banks wrote:
> >
> > >
> > >   Compilers can generate code sequences that are extremely difficult
> > >   to maintain in assembler. For example, on the PIC's using the lsb of
> >>    the PC to implement an unconditional skip the generated code
> >>    sequence is address dependent..
> >
> > Walter,
> >
> > Could you give us some examples where this may be useful?
>
> One example on the MPC compilers is the skip transformation
> when you have a skip instruction that is missing its
> compliment in the instruction set. A Skip followed by
> an unconditional skip transforms the pair into the
> compliment function of the first skip.
>
> Microchip PIC's do not have an unconditional skip so
> we created one by skipping on the lsb of the PC.  The
> alternative is to use a goto but that may require ROM
> memory management. The unconditional skip is always
> a single word instruction and leaves memory management
> alone.
>
> The following code fragment illustrates the point.
>
> 0025 3328    TSTFSZ 28               if (i)
> 0026 9002    BTFSS  PCL,0
> 0027 C02A    GOTO   002Ah
> 0028                                  {
> 0028 0000    NOP                        NOP();
> 0029 0000    NOP                        NOP();
>                                       }
>
> 002A 3328    TSTFSZ 28               if (i)
> 002B 9802    BTFSC  PCL,0
> 002C C02F    GOTO   002Fh
> 002D                                  {
> 002D 0000    NOP                        NOP();
> 002E 0000    NOP                        NOP();
>                                       }
> 002F 0002    RETURN                }
>
> Walter Banks
>

Yeah butt,

     movf  28,f   ; i is at address 28
     skpnz
      goto l1

or
     movf  28,f
     skpz
      goto l2



Handles each of these situations too.

At the risk of giving Clyde a competitive advantage, could you give another
example? The only other conditional branching instructions that skip on only one
polarity are the incfsz and decfsz. I could see how you could use this trick to
implement an infsnz [the mnemonic as given in the 18cxxx instruction set] that
does not affect the z-bit.

    incfsz  i,f
     btfss  pcl,0
      goto  l1

but the same thing can be implemented with:

    incf    i,f
    skpnz
     goto   l1

(but the z-bit IS affected).


Scott