> OK, how about a new but similar question...
>
> What should we do with unused CMOS SRAM bi-directional DQ i/o's?

I've always had better results with a common-ground 8-resistor (100k)
array across the data lines of SRAM and use them as a matter of course.
I suspect this helps stabilise the buss, and has a pronounced effect
particularly when writing at speed, possibly more so in CMOS rather than
TTL systems and especially when the address/data drivers are not close
to the RAM. An NOP or two between address/data set-up and the WE flick
does the job too if there's track or lead capacitance around, something
you can't always avoid in a prototype for example.  If the dataline is
unused 100k won't hurt it as a termination.