gacrowell wrote:

> What should we do with unused CMOS SRAM bi-directional DQ i/o's?

  Prior to CMOS, this never mattered.  This has been discussed on the
MC68HC11 list, and it is recommended to fit pull-ups.  On a bus where
there is always some activity, you would expect lines to simply stay in
the last-used state between accesses and not cause trouble.

  Similarly, the brief delay between startup and initialisation of
unused port lines as outputs (notably on the PIC) should not be of any
concern unless you propose to hold the chip in reset for a prolonged
period.

> Right now it looks like a separate pull-up on each unused DQ pin (x 17
> pins x 42 chips = a bunch of resistors).

  This is the purpose for which SIL resistor packs were made, thereafter
SMD and pick-and-place machines.  That's a pretty bizarre circuit you
describe there though, so many separate data lines and so many unused.
--
  Cheers,
        Paul B.