OK, how about a new but similar question...

What should we do with unused CMOS SRAM bi-directional DQ i/o's?

In this particular case, we are using only one DQ out of a x18 chip.  As we
access the single data bit, the other unused i/o's are going to be switching
from input to output as reads/writes occur.

In general, we didn't think it would be a good idea to tie them directly to
VCC or GND, or together to a single pull-up or down.  If the first activity
to any address on the chip is a read, and the state of the chip is unknown,
the outputs would conflict.  Eventually all locations would be written, then
the state of each bit will be known, but even then we didn't think it would
be a good idea to have the outputs tied hard together - variations in the
drivers might cause currents between them (?).

Right now it looks like a separate pull-up on each unused DQ pin (x 17 pins
x 42 chips = a bunch of resistors).

Opinions?

Gary Crowell