I did not look at your program in detail. However, I did notice that your delays are 100us and 50us. At 9600 baud they should be 1/9600 = 104.2us and half that which is 52.08us. 104us and 52us are close enough. The total delay must be accurate. This includes the delay caused by the instructions sending or receiving the data. I hope this quick note helps. -- Rich JB wrote: > As a follow-up on this - I'm using Hyperterminal in W95 for the receiver terminal. I have noticed that about half the time when starting/stopping the connection I get garbage (like bits having been shifted). The rest of the time, it works great. I'm obviously not doing something right. The delays are not exact, but within about 5uS, which may or may not be good enough. FWIW, the code is below (W contains byte to be sent). Once again, the levels are inverted, configured for 9600 8/n/1. > > JB > > Sendbyte: > movwf MYBYTE > bcf PORTA,dataout ;startbit 1t logic high > call Delay100uS > bsf PORTA,dataout ;startbit 1/2t logic low > call Delay50uS > movlw D'8' > movwf BITCNT > bitlp: > rrf MYBYTE,f ;lsb first > btfss STATUS,C > goto sendlow > sendhigh: > bcf PORTA,dataout ;direct-connect so invert > goto bitset > sendlow: > bsf PORTA,dataout > goto bitset ;this would fall through, but > ;keeps bit timing symmetrical > bitset: > call Delay100uS ;1t each bit > decfsz BITCNT,f > goto bitlp > bcf PORTA,dataout ;stop bit 1t logic high > call Delay100uS > return > > Delay100uS: > movlw D'32' > movwf AA > lpA: decfsz AA,f > goto lpA > return > > Delay50uS: > movlw D'16' > movwf AA > lpA1: decfsz AA,f > goto lpA1 > return > > At 04:15 PM 3/26/00 -0700, you wrote: > >I have found numerous rs232 references on the voltages, cable lengths, connector pin-outs, etc., but nothing whatsoever on the actual signals on the wire going from one device to another. What does the actual waveform look like for instance, while transmitting the octet H'25' at 9600 baud, 8/n/1? > > > >I have discovered through trial and error that this works when communicating to my PC at both 9600 and 4800 baud (logic levels indicated - actual levels inverted due to direct connection from 16F84 to PC): > > > >high 1t > >low 0.5t > >bit 0 1t > >bit 1 1t > >bit 2 1t > >bit 3 1t > >bit 4 1t > >bit 5 1t > >bit 6 1t > >bit 7 1t > >high 1t > > > >My question is: Should this work? Am I just lucky, or is this a sound implementation of the standard? I know the voltage levels are questionable from a portability standpoint - it's the logic states and timing I'm questioning. > > > >Thanks, > > > >JB > >