A long time ago I did this. The optics diffuse around the mask, the mask registration varies, and the etching is microscopically irregular. This causes line width differences between chips on the same wafer, chips from different wafers within a lot, and chips from different lots (increasing order). No process can eliminate these variations, so the chips are tested at speed, on failure tested at lower speed, etc until they are thrown away. This helps to keep up the yield numbers and the profits. The tests are done at "worst case conditions" by calculation and experience, so there will be instances where a failure is the result of extreme conditions that you will not see in a given design, but these boys are professionals and don't throw away good parts. The difference in price is rather small in low quantities and this is BAD PRACTICE for volume production, but for a student who has to choose between dinner and a PIC. Man does not live by bread alone! Dan "Brandon, Tom" wrote: > Don't know about PICs, but PC CPU's are a similar idea I believe. The basic > principle is that 1 atom of contaminant in the silicon noticably effects the > heat conductance of the chip at that point. You can't stop single atoms of > impurities forming only cut them down, we just don't have the needed > technology. So, Intel (or whoever) has one production line for say 3 diff. > chips, 200, 233, 266. All the same die as Mark pointed out, the only > difference is the amount of impurity. > > So a lower speed graded chip just has a little more impurity meaning it > heats up a little more. It's actually a large difference in heat dissipation > at the scale they work on but overall it's minimal. i.e. a slower chip won't > neccesarily run hotter at a macromolecular scale just in the silicon there > will be hot spots. > > NB: I'm pretty sure of this but don't count on it. > > Tom. > > -----Original Message----- > From: Mark Willis [mailto:mwillis@FOXINTERNET.NET] > Sent: Thursday, March 23, 2000 8:58 AM > To: PICLIST@MITVMA.MIT.EDU > Subject: Re: Rated PIC speed ? > > My understanding is that when the needed quantities of higher speed > rated testing chips are done, the rest of the same identical parts are > tested at the lower clock speed and then sold as the slower part. Most > all probably *would* test OK at the higher speeds. All are identically > constructed on the same equipment, no electrical or physical differences > (the occasional die shrink happens occasionally, but that happens to ALL > the parts, not just the higher speed ones ) They may test at slower > speed first, know how to look it up so I don't store that info > > > > Mark > > Tobie Horswill wrote: > > Hi, > > > > I've just noted that the last batch of PICs I bought (16f84 and > 16f877) > > were of the 04/P type. I've been running the F84 at 8 Mhz and the F877 at > > 20Mhz without any problems, they don't seem to be overheating. > > > > What's the physical difference between de 4Mhz and the 10 or 20Mhz > > versions and do I risk damaging them if they are run overclocked for long > > periods ? > > > > > Thanks, > > > > Tobie > > -- > I re-ship for small US & overseas businesses, world-wide. > (For private individuals at cost; ask.) -- Daniel Hart Embedded System Design Engineer NBS Technologies, Inc. (Card Technology Corp.) 70 Eisenhower Drive, Paramus, NJ 07652, USA +1 201 845 7373 x183 dhart@nbstech.com