Kev wrote: > I'm muddling thru the 16F84 and I understand MicroChip does not intend > to support the TRIS instruction in future products (is it usable in > the 16F877?). Whatever future products to which this peculiar statement may refer, have not surfaced in the six or eight years of development during which it has been made. I interpret this to indicate a personal vendetta by someone fairly senior within the organisation which is being discreetly ignored by the remainder of the design force. I may be wrong. IOW, it (TRIS) functions correctly in all parts. In some parts it does not exist as such because it is already directly equivalent to MOVWF TRISx but a macro is either already provided, or trivial to write, to make "TRIS" do the same job. > So in place of a TRIS command I would simply use a MOVWF TRIS(A,B,etc) > assuming that W is loaded with the desired mask? It's not that simple. The TRIS register is on the second register "page", and RB0 (or others) must be set to access it and restored afterward to whatever is necessary for normal program flow (usually, it must be cleared so you can access the corresponding PORTx). This was a very bad and most embarrassing design blunder which presumably explains the odd recommendations. That's why it's best to simply *use* the TRIS instruction where is is convenient to do so and ignore the misleading comments in the documentation. The spurious assembler warning can be removed by writing ERRORLEVEL -224 into all .INC files for 14-bit core parts. Remember, Microchip has not yet produced *any* part which does not support the TRIS instruction, including the 16F87x. Neither are they likely to do so because it would cause considerable nuisance to designers, both with existing code and because not having it causes performance degradation (three instructions instead of one to "bit-bang" open-collector IÓC functions and similar). Do note as the other chaps have said as I write this, that it only works for ports A, B, C. TRIS on other ports is not intended to be manipulated other than during initialisation. -- Cheers, Paul B.