from
http://techref.massmind.org

http://www.microlet.com/yam/. Schematics for their early FPGA, which
includes     a Digital PLL implementation.

All digital PLL is generally not a good choice to reduce jitter (unless your
jitter's real bad to begin with). Jitter attenuators do the job, though
http://www.dalsemi.com/DocControl/PDFs/2188.pdf...

The Bell Labs tech journals from the mid 1970's have tons of articles on
jitter in communication systems.

The bible on analog PLLs theory is "Phaselock Techniques by Gardner (1979)"

"Phase Locked Loops : Design, Simulation, and Applications" by Best has a
very basic intro to DPLLs

"Monolithic Phase-Locked Loops and Clock Recovery Circuits : Theory and
Design" from the IEEE is more current, and has a good PLL theory section.

http://www.infosite.com/%7Ejkeyzer/piclist/2000/Feb/1777.html     Using a
PLL and an integrator to measure the amplitude of a signal at a given
frequency an reject noise (a one channel spectrum analyzer)

---
James Newton mailto:jamesnewton@geocities.com 1-619-652-0593
http://techref.massmind.org NEW! FINALLY A REAL NAME!
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-----Original Message-----
From: pic microcontroller discussion list
[mailto:PICLIST@MITVMA.MIT.EDU]On Behalf Of Peter Crowcroft
Sent: Friday, March 17, 2000 01:05
To: PICLIST@MITVMA.MIT.EDU
Subject: [OT] PLL's


Can anyone tell me some websites with good introductions to PLLs on them?

thank you,

regards,

Peter Crowcroft
                    DIY Electronics (HK) Ltd
                PO Box 88458, Sham Shui Po, Hong Kong
Voice: 852-2720 0255   Fax: 852-2725 0610    Email: peter@kitsrus.com
                       Web: http://kitsrus.com
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