Wagner Lipnharski wrote:

> The above slack window will represent a AC line window with a maximum
> of 10Vac (in a 120Vac line), what can not be considered zero crossing.
> Of course that timing circuits of 263µs could be implemented after the
> transistor collector goes up, but it will always be ac voltage
> dependent, and never precise.

  Considering the risetime at this point in the waveform, I don't think
the variation with voltage will be that much (in fact it will be closely
proportional).

  The question to be asked is: What is this for?  Usually for mains
phase control switching.  The time delays can be corrected in software;
indeed I think a software PLL to correct for interference and general
jitter is the way to go (but haven't tried it yet).

  And it is *not* a good idea to attempt to fire the Triac within 10V of
zero-crossing in either direction anyway.  Part of the circuit design is
to avoid this very thing.
-- 
  Cheers,
        Paul B.