Dennis Gearon wrote:

>I highly recommend driving the gate of a power mosfet through a resister
>at the least, and a buffer circuit for speed's sake. The charge
>capcitively coupled through the Cdg(draid gate capcitance) has
>tremendous, short term energy. It can destroy your microcontroller.
>instantaneously, it can have the same voltage as the voltage swing on
>the drain. Example, turning on or off a 1000 volt signal can put 1000
>volts on your microcontroller pin. (It doesn't have to be that big of a
>voltage to cause probems). It's also a good idea to connect a 12-150 ohm
>resister Directly to the gate, near as possible. This dampens
>oscillations that start easily with these hi gain, high power, hi input
>impedance devices. And finally, the simplest/cheapest drive circuit I
>know of is below:

I agree with your recommendation to put a small resistor in series with
the gate, but I disagree with your reasoning.

First of all, those kind of transients on the gate would destroy the FET
long before they would destroy the PIC, ESPECIALLY if you put in a
resistor and allow the gate voltage to flail wildly.   Very few FET's can
withstand more than +-20V at the gate, and most logic level ones are +-10
or even +-8.  The PIC's I/O's are pretty rugged, as opposed to the FET.

Second, the gate can only be driven through the Cdg if the Drain is
driven externally to the transistor.  Why? Because the Cgd has the effect
of negative feedback during normal operation of the FET - during turn
off, the rising drain voltage tends to raise the gate voltage (through
Cdg), which turns on the FET, which prevents the drain voltage from
rising.  Same thing happens in reverse during turn-on.

Third, the gate capacitance is distributed along the channel.  Therefore,
only a portion of the drain voltage would be seen across the 'average' of
this distributed capacitance.  As it turns out, it's a very small
portion.

So why DO you put a resistor there?  It's to damp the ringing and (as you
said) possible oscillation generated by the gate capacitance, lead
inductance, and high gain.  If you keep your leads really short, 10 ohms
is a good value, and if they are longer, use up to 100 ohms.  This
resistor should be placed physically close to the gate.

Your drive circuit isn't bad.  I'd put the resistor between the PIC pin
and the base, rather than from base to power supply, so that you can put
the pin in output mode and leave it there, turning the FET off by writing
a 1 to the pin, on by writing a 0.  As you have it, you have to use an
open drain output, or simulate one by having the pin in output mode to
turn the FET off, and tri-stated to turn the FET on.

I also think we're going to have to modify this drive circuit as gate
threshold voltages continue to be reduced.  This circuit drives the gate
down hard only to around 1.0V, then the 100K resistor takes over to pull
it the rest of the way to ground, v.e.r.y  s.l.o.w.l.y.  Already I've
seen FET's with minimum Vgs(th) of 0.7V, and this driver would not turn
them off well under all conditions.  To get better turn-off for FET's
with Vgs(th) (min) below 1V,  use a schottky diode and a transistor with
low saturation voltage.

If you don't need more voltage on the gate than the PIC can provide, a
simple NPN-PNP totem pole works well.  A 2N3904 with collector to 5V,
2N2906 with collector to GND, both bases to PIC and both emitters to gate
(through 10-100 ohm resistor) is not bad.  You can drive the gate from
0.7 to 4.3 V this way.

Of course, all this gate drive crap is only needed if you want your FET
to turn on and off really fast (less than 1 uS).  If you are driving a
relay, 10-100 ohms from PIC to gate works fine.

Don