Jeff King wrote:

> By messy I meant the multiplex code on a PIC that doesn't have a TMR
> overflow IRQ.  My "assumption" is he was trying to get the absolute
> lowest price.... meaning, no TMR overflow IRQ.. but been a while since
> I worked on a real low end PIC.... do they all have TMR overflow?

  No, the low-end devices have neither IRQ, which doesn't matter a hoot,
nor TMR0 overflow flag (T0IF) which is *much* more important.

  But it's still really easy.  You must of course use polling, but this
is no great hassle.  You divide up your "main loop" processing into
blocks which are achievable within your multiplex interval, say 2 ms.

  You intersperse the sequence of these blocks with alternate waits for
one and zero on TMR0 bit 7, and arrange so that TMR0 overflows each 4 ms
(i.e., bit 7 toggles each 2 ms).  IOW, TMR0 is clocked at 64 µs,
prescaler set to 32 (option mask b'100') using 4.096 MHz crystal.

  Program flow goes:

waithi  macro
  btfss   TMR0,7
  goto $-1
  endm

waitlo  macro
  btfsc   TMR0,7
  goto $-1
  endm

loop:
  do_1st    ; Up to approx 2 ms processing
  waithi
  strobe_next_digit
  do_2nd    ; Up to approx 2 ms processing
  waitlo
  strobe_next_digit
  do_3rd    ; Up to approx 2 ms processing
  waithi
  strobe_next_digit
  do_4th    ; Up to approx 2 ms processing
  waitlo
  strobe_next_digit
  goto  loop

  Note that do_1st, do_2nd etc. do not have to always execute in less
than 2 ms, as long as they do so on average and never, in combination
with strobe_next_digit, approach 4 ms either singly or as a consecutive
pair.  Hope this is clear

Scott Dattalo wrote, quoting Jeff King:

>> Is there another term then back to back for this configuration?
> The term you're looking for is 'anti-parallel'.

  Yeah, and various other permutations thereof.  One, numeric, sprang to
mind but I dare not say... (;-)

Jinx wrote:

> Combining the 4-pin and 4017 methods together - use a BCD- output
> counter (eg 74LS393 or 4040) and set the bit pattern on the o/ps to
> match the 4-pin PIC idea.

  Sorry, it doesn't work that way.  The 4-pin trick requires the ability
to tri-state (set to input) the I/O lines.

  Also, if you're going to use an output expander, you want a shift
register which loads all your data in 8 clocks, rather than a counter.
Updates will be so fast that intermediate states will be invisible, so a
latching shift register is unnecessary for display.

  If each output of a 74HC164 will drive sufficient current (you can
have 10 mA, but no more :), then use five of the outputs to drive up to
five LEDs out of your ten low simultaneously, and two other outputs (one
left over!) to multiplex alternate banks of five LEDs high via a NPN
emitter follower with collector supplied from unregulated Vcc.

  Resistors are only required for the five cathode drives, none are
needed for the emitter followers.  The same method could be used with
seven PIC outputs, which can drive five LEDs low simultaneously with
20 mA.  This is similar to the original multiplexed proposal except that
the emitter followers allow lots more current - much brighter!
-- 
  Cheers,
        Paul B.