Hi to all engineers.

here is more info about the 0x04 vector. this code currently under
production.
 The person wrote this code never worked on PIC before.
He told me that he was getting unexpected interrupt but I didn't
know he wasn't using 0x04 vector at all that is why he it saving w and
status registers again. He tells me that   intDispatch: is the vector does
it make sense ?



                         org     0
ResetEntry:         movlw   0xff
                           movwf   PORTC           ;init portC pins high
                           movwf   PORTA           ;port A outputs high
                           goto    Start

;***************************************************************************
***
;Peripheral interrupt entry:
;  Note: Code designed to ALWAYS be in ram bank 0 while interrupts enabled
;***************************************************************************
***
;vector to appropriate interrupt source handler
;Latency time starts with 4 cycles to get here:
Hi to all engineers,

IntDispatch:        btfsc   INTCON,T0IF         ;timer0 overflow interrupt
(T0)
                          goto    T0_ISR
                          btfsc   PIR1,TMR1IF
                          goto    TMR1_ISR                ;timer1 overflow
                          btfsc   PIR1,CCP1IF
                          goto    CCP1_ISR                ;compare interrupt

;Unexpected interrupt here...
; I have found suprious interrupts occasionally occur
; RBIF and SSPIF are set at this point but the corresponding enable bits are
cleared
; so there is a mystery at to what the interrupt actually is.  These
interrupts occur
; once every few minutes, and may be only associated with emulator pod, but
this is not
; know for sure.

                if      0

;Clearing any flag bits appears to be unnecessary here since none of the
 ; enable flags are set.  I don't know how we get here but we do, and this
; gets us out

                movwf   w_save2                 ;save W
                swapf   STATUS,w
                movwf   status_save2

                movf    PORTB,F                 ;clear RBIF int cause
                bcf     INTCON,RBIF             ;clear RBIF
                bcf     PIR1,SSPIF                  ;clear SSPIF
                swapf   status_save2,w
                movwf   STATUS                  ;restore status reg
                swapf   w_save2,f
                swapf   w_save2,w               ;restore w reg
                endif
                retfie                                      ;must return to
keep stack clear



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