"Paul B. Webster VK2BZC" writes:
>>>        BCF STATUS, RP0 ;
>
>  Is there some code between this and the following?  Otherwise it is
>redundant.  It should appear *after* the setting of TRISB.
>
>>>; clearing output data latches
>>>        BSF STATUS, RP0 ; Select Bank 1
>>>        clrw    ;Set w to 0 to make all outputs.
>>>; initialize data direction
>>>        MOVWF TRISB ;All 8 bits are now outputs.

        No.  That is how I have it in the original source code and it
seemed a bit strange to me.  This is the first PIC code I have
actually written even though I have been on this list for about 5
years.  I have written assembly code for other processors, so this
experience is like having a chat with someone from another
English-speaking country.  It's all familiar, but the differences can
throw one for a loop, sometimes.

        Warnings are usually there for a purpose even though they may
not immediately shut down what one is doing, so I figured I had better
find out what sort of trouble I was starting.

        Sorry about reviving one of those cyclic topics again.

Martin McCormick WB5AGZ  Stillwater, OK
OSU Center for Computing and Information Services Data Communications Group