Dwayne Reid wrote:

> Not a problem - just a warning message that MPASM noticed that you
> were writing to a register with an address higher than 0x7F.  The
> message is remind you to check that you have set the ram page bits
> correctly.

  .. and proceeds to detail a set of macros for the general case.  In
the specific case given:

>>;from EXAMPLE 5-2: INITIALIZING PORTB
>>        BCF STATUS, RP0 ;

  Is there some code between this and the following?  Otherwise it is
redundant.  It should appear *after* the setting of TRISB.

>>; clearing output data latches
>>        BSF STATUS, RP0 ; Select Bank 1
>>        clrw    ;Set w to 0 to make all outputs.
>>; initialize data direction
>>        MOVWF TRISB ;All 8 bits are now outputs.

  And that said, in the specific case, the optimum solution is to not
jiggle the RP0 bit at all as there is an opcode specifically to perform
the job.  Use these two lines only:

        clrw             ;Set w to 0 to make all outputs.
        tris    portb    ;All 8 bits are now outputs.

  This generates a quite spurious warning which can however be dealt
with most elegantly by editing the directive "  errorlevel -224" into
the P16C71.INC file (and any other 16C7x(x) or 16C(F)8x(x) includes you
may use).  It's cleaner, faster to execute and has no troublesome side
effects on banking.

  Also note the corresponding OPTION opcode to set the option register
without banking problems, and that the TRIS opcode only operates on the
TRISA, TRISB and TRISC registers.  Fortunately this covers the vast
majority of cases.

</FAQ>
--
  Cheers,
        Paul B.