the TAD is the minimum time, so the slower time will work.
     your problem may be that you are not allowing the A/D to track
     before you take your next sample.

     I have two hints.
     1.) wait the minimum tracking time between succesive A/D readings
     (this is the time for the internal capacitor to charge up
      before it is disconnected from the external pin)

     2.) Don't change any of the ouput pin states. or else the
     internal power change throws the reading way way way way off.

     -Craig Beiferman


______________________________ Reply Separator _________________________________
Subject: A/D conversion clock weird anamoly PIC16C710
Author:  pic microcontroller discussion list <PICLIST@MITVMA.MIT.EDU> at
INTERNET
Date:    11/28/99 8:15 PM


I am working with the PIC16C710. I am using its A/D module
in a design. It states in the databook that the minimium TAD time needs to
be 1.6us. I am using a 20mhz crystal and the choices I
have through ADCON0 are 2*TOSC, 8*TOSC and 32*TOSC.
for a 20mhz crystal, TOSC = 50ns. So:

IF TAD = 2*TOSC = 100ns (illegal TAD)
   TAD = 8*TOSC = 400ns (illegal TAD)
   TAD = 32*TOSC = 1.6ns (legal TAD)

The funny thing is that the A/D was inaccurate if I set it to 32*TOSC,
but was perfect with 8*TOSC which according to the data book is in
voilation. 2*TOSC was inaccurate, but that certainly makes sense.
Why would a slower clock give worse results, especially when the faster one
was in violation!!
I repeated this experiment with different oscillators and also
tried it with a PIC16C77. Same thing!!

Perhaps someone has run across the same anamoly and has some kind of
explanation for it. I really should not complain, since the faster A/D
conversion is nice. But since this design will be part of a product, I am
concerned about pushing any spec, even though it works better in the lab.

Thanks


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