On Thu, 28 Oct 1999 16:31:00 -0600 Wendall Siemens <wsiemens@RYANCDN.COM>
writes:
> Does anyone know of a specific chip or commonly used way of
> programming
> bootload code into parallel EEPROM that is already soldered on to a
> PCB?
>
> Essentially the best device would be a serial and parallel EEPROM
> which
> could be programmed serially while on the board and then have the
> microprocessor read from it parallel(ly).

I don't think such a dual-port EEPROM exists.  If you just need to load
code once at the factory it could be done with a test clip on the EEPROM,
if the hardware driving the EEPROM can be disabled.  Many CPU's put their
address and data bus in tri-state during a reset, which of course is
ideal.  If it's a larger system with address and data buffers these can
be disabled with a little extra circuitry to support that mode.

But suppose you want to be able to load code at any time (that way, you
never need to "finish" the program, since you can always "update" it
later).  If the EEPROM is connected conventionally to a relatively slow
8-bit CPU you could use a method I've done before.  It is necessary to
put "another micro on board" but it is only an 18-pin PIC.

This method is not one for the beginner.  But it is really neat when it
works.  The PIC is connected to the existing hardware in these places:
the main CPU clock, the main CPU reset, the address decoder, and the
8-bit data bus.  In most cases only a couple of logic gates, if anything,
would need to be added besides the PIC.  Two or 3 pins of PORTA are open
to input your data.

For normal operation the PIC tri-states the port connected to the bus,
enables the address decoder, and resets the CPU.  The CPU operates as if
the PIC isn't there.

To program the EEPROM, the PIC holds the CPU in reset and disables the
address decoder, so no memory devices will drive the data bus (probably
you want to allow the CPU to write to the EEPROM even in this "disable"
mode, for reasons that will become obvious).  The PIC port connected to
the data bus is set for output.  Then the PIC brings the CPU out of reset
and forces it's own data onto the bus.  Since the PIC and CPU are
connected to the same clock, it is possible for the PIC to force
instructions and data onto the bus at the right time for the CPU to
accept and process them.  By using the right sequence of instructions,
you can make the CPU run a write cycle to the EEPROM with an address and
data supplied by the PIC.  In effect you use the CPU as an address latch,
avoiding the need to add one to support the programming mode.  To program
another byte, the PIC resets the CPU and does the same thing again.

The exact implementation depends on exactly what CPU and other hardware
is involved, but hopefully this has planted the seed of an idea.


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