James Newton wrote: > 1. Accidental grounding or energizing of an output pin (via a dropped > pen or paperclip, ill-formed trace, bent component lead, etc...) to > the opposite rail CAN smoke the chip and is far more likely > (especially in the hands of a newbie) than any other serious error. And statistically would be somewhat more likely to short to ground in most designs. > Yes, since most projects have more used than unused pins, a short is > more likely to happen to an in-use output pin but, given equality in > other areas, why increase the chance? I was not going on that basis (most pins already used) but rather on the concept that the more trace and pads you have connected to any given pin, the more likely to make a short. > 2. The cost of the resister is minimal to the projects that beginning > PICers will be turning out. Every piece counts. > Experienced production personnel, like yourself, Oooh! That *was* tongue-in-cheek! > 3. Many low power PIC applications involve the chips power cycling, > sometimes rapidly. The power loss due to rapid switching of a > tri-stated input pin may be significant. Indeed it could. > I would like hard data also. Hopefully someone will actually *do* the experiment? > A 100M resistor at 5 volts is 50nA IF set incorrectly. Dave's already taken you to task on that. I don't think you really meant it, did you? I know for starters that you cannot get anywhere near that value in SMD or SIL packs. 100k more likely. > I have seen power consumption increase by 50mA when the pull-ups were > removed from an unused port on an old Z80/PIO project. Now, that was > an old TTL (I think) PIO and there was a lot of RF noise on that board > so I doubt anything that extreme would happen on a little PIC thing > today. Data on PICs would be nice. You have me at a loss for a mechanism on that one. Dave too, it seems, he has interpreted it the other way round I think. > I also have another hidden reason for recommending the resistor that > you have, almost, hit upon. Ah! *NOW* you come clean! > I have found that the last minute design change or feature addition > is the rule rather than the exception. I ALWAYS allocate space to > bring out every pin used or not. Getting inexperienced people in the > habit of placing that resistor makes them better prepared for the > reality of EE life. I know that on many occasions, people that I have > mentored have related that a last minute change was eased because they > were able to replace the resistor with another component or wire in a > jumper to satisfy the unforeseen need. Good thinking 99. Robert A. LaBudde wrote: > After watching all of this discussion, I have come to a personal > conclusion ... that the best solution appears to be to set all unused > pins to output HIGH with 10k pull-up resistors. I'd give you two reasons to pull *down* as James suggests. 1} a short is more likely to occur to ground. 2} If you have to use the points to connect to an external device, you are more likely to want to reference it to ground. Tony Nixon reminds us of bizarre problems with unterminated inputs (a good argument for making them outputs! ;-). This still worries me, as it conflicts with the use of them for analogue assessments. I'd still be suspicious of interrupt problems with interrupt-on-change or RB0 if one was looking for an explanation rather than undocumented chip problems! My limited ATMEL experience says: "Don't forget to terminate RESET!" -- Cheers, Paul B.