Yes, I followed your lead and it worked.  I placed nop after the clear display a
nd nop after bsf  PORTA, E.  I looked at the timing diagram and it requires a mi
nimum of 300ns.  The pic is running at 1us per clock cycle so I did not think th
at the timing would be a problem.  However, I do not have an oscilloscope to che
ck the timing.

One more problem.  When I go from a RC oscillator to a HS (tried both 2Mhz and 1
0Mhz) oscillator the pic keeps resetting.  I have tried a .1uf capacitor between
 +5 and Ground and 1uf between +5 and Ground with no change in resetting.  Any s
uggestions.

Rob Gamlin wrote:

> Caught this half way through, may have missed some.
>
> For what its worth I deal with 4 BIT lcd using a single 4094 on a common Data/
Clock bus, therefore outputs only. As long as you issue the Busy Read command, u
nless the command is a Clear LCD or Clear Ram then you will have to be clocking
Vfast to overrun the output. After issuing a Clear command I enforce a delay in
some way to ensure the completion. LCD docs will tell you the command timings.
>
> Hope this helps,
>
> Rob.