Adrian, Expanding on Steve Baldwin's answer The FET you have chosen is an N Channel FET. terminals are, left to right, pins down, viewed from label side g gate (control terminal) d drain (similar to collector) s source similar to emitter This can be thought of as SIMILAR TO an NPN transistor with a few very important differences. To turn it on the gate (input) must be greater than the source terminal. You have chosen a "logic level" FET which means you only need about 5 volts to turn it on. When the FET is "on" the drain and the source form a low(ish ) resistance connection. Unlike a transistor this is a true resistive connection so current passing in either direction will see a true ohmic connection - NOT a diode junction. However, and this is the bad news, when the FET is OFF, in one direction the FET appears as a high resistance (drain more positive than source) but in the other direction there is a diode so when drain goes more negative than source the diode conducts. This diode is an inherent part of the FET design. In your design there are two choices. 1. FET as "low side" switch breaking the ground path to the load. Load from Vcc to FET drain FET source grounded. Input voltage to gate (high = on) 2. FET as high side switch. Load from FET source to ground (which it appears is what you want) FET drain to Vcc (via resistor) Now the awkward part FET gate to Vcc+5volts to turn FET on FET gate at Vcc to turn FET off. Getting the gate above Vcc can be a nuisance in 5 volt circuits. If no high voltage supply is available AND the FET is to be on for a limited period this can be done with a simple diode pump. I won't use ASCII art. Draw this PIC output to "bottom" of a capacitor. Diode Anode to Vcc. Diode cathode to "top" of capacitor When PIC output is low top of cap charges to Vcc.- diode drop Take PIC output high to Vcc. Top of cap is driven to Vcc + (Vcc - diode drop) Connecting this point to the FET gate in case 2 will turn the FET on. This is the basic circuit outline and there will be more needed in practice. In your case use of a P Channel FET (rarer, dearer, fewer available in logic level drive) will allow you to use the mirror image of circuit 1 directly driven by the PIC. **** EASIEST **** Using an pnp transistor amay also attractive (emitter to Vcc, collector to load, load from collector to ground. Drive base low (via resistor) to turn on. There are many transistors which will do this. To drive directly off PIC beta needs to be at least 2A/20mA = 100 at 2A. Ensure beta is at least this high - preferably a bit higher. As noted elsewhere, Zetex make some very nice small (TO92 variant) package transistors with high current and high beta. I use ZTX749 in a similar circuit - this from memory is only be a 1A part with a beta of 100 at 1A - a bit low for you. Here we are ZTX788B PNP Farnell 707-790 3A max cont (8A peak) 15V max !!! (take care with inductive spikes) Beta = 300 at 2A !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! est UK#0.65 ish ??? in 1's 0.45v Vsat at 2A = 900 mW dissipation E-line (improved TO92 pkg) Worth a look: The ZTX705 (Farnell 432-933) is a 1A darlington with a beta of 3000 at 1A. Russell McMahon _____________________________ >From another world - www.easttimor.com What can one man* do? Help the hungry at no cost to yourself! at http://www.thehungersite.com/ (* - or woman, child or internet enabled intelligent entity :-)) -----Original Message----- From: White Horse Design To: PICLIST@MITVMA.MIT.EDU Date: Monday, 25 October 1999 04:15 Subject: Philips BUK100-50GL MosFET issue >I bought a couple of MOSFETS, Philips BUK100-50GL, overkill I know (for my >current requirements) but easily available from the Farnell catalogue. I >haven't found data sheets or application notes yet, but they are driveable >from TTL which sounded attractive. ;-) > >It's a TO220 package with the pins labelled (top view looking down) i/p, d, s. > >I've experimented with a 0k, 10k and 100k resistor connected from source to >i/p, +5V on the source (source voltage) and drain going to target Vcc control. > >I find I get 4.5V out when the i/p is floating or tied to Gnd or tied to >+5V, in all the above except with the 10k resistor where the output fell to >about 4.1V. > >Anyone mind telling me what I'm doing "wrong"?! > >Or any alternatives for controlling two 5V devices from digital TTL (or 5V >and 3.3V later) which take around 500mA (5V), and around 300mA (3V) - but >with very short 2A peaks (GSM when transmitting). >Regards > >Adrian >--- >WWW WWW Adrian Gothard >WWW WW WWW White Horse Design >WWWWWWWWWW +44-385-970009 (Mobile/SMS), +44-118-962-8913/4 (voice/fax) >WWWW WWWW whd@zetnet.co.uk, http://www.users.zetnet.co.uk/whd >--- >Developers of GPS satellite-based tracking systems for vehicles/helicopters >