Isn't time to someone produce a microcontroller with somekind of
    programmable "dma" for fast uarts?

Yes.  Motarola did, of course, in their 68302, QUICC, and powerQUICC
chips (which are a bit more than "microcontrollers", I guess.)

DMA isn't normally very simple, though.  You still need interrupt routines
to handle buffer terminations, and those routines are much more complex than
a character-based transmit scheme (if you're not copying the data, it needs
to be locked against modifications during DMA, for instance.)  (The
fundamental problem is that serial IO is MUCH slower than processing
speeds.)  Handling "responsiveness vs efficiency" issues for a typical
interactive UART receive routine using DMA is a real bitch.  Most
manufacturers simply increase the FIFO size of the UART.  Once the FIFO size
exceeds the "typical" message size, you get behavior similar to what you're
asking for (however, since you still have to copy the messages, you don't
gain quite as much efficiency - you only save N*interruptoverhead, which can
be small compared to the rest of the processing.)  I'm not sure whether
there are any deep-fifo UARTS in microcontrollers - RAM is "expensive" on a
chip, remember, and when controller people are talked into adding it it
usually shows up as general purpose ram so that it can be used for things
OTHER than the uart as well.


    The actual very low cost of uC cores could allow to include more than
    one CPU at the pkg, to deal with different intelligent tasks.  Two CPUs
    running at 20Mhz will not consume the same power of one CPU at 40Mhz,
    but certainly will do more job, since reducing interruptions it also
    reduces lots of stack usage, and wasted time.

Also present in the motarola chips I mentioned.  And you're (seriously)
underestimating the overhead and complexity of runing a multiple processor
system, which goes up exponentially with the degree of "general purposeness"
of the additional processors.


    Just in time; An internal third CPU could be implemented with math and
    special routines factory hard coded or custom code eeprom, how much
    would cost that? extra $30 cents per unit?

It'd double the size of the die.  I dunno if PICs price is still
proportional to die size (seems like the dies should have shrunk by now,
but the price hasn't gone down much!)  Sounds like an interesting idea
for any design where you have extra space left on the die.

Or do you mean like the FPU in a big processor?  Seems to me the
difference in price between a 486sx (no FPU) and a 486dx (FPU) was
pretty substantial!

BillW