At 10:49 AM 9/27/99 +1000, Thomas wrote: >1) Clock > This will be at whatever clock frequencies are present. Robert said >"Don't forget that clock dividing is going on inside your chip. (E.g., >divide by 4), so lower frequencies will be present." but I'm planning to use >a Scenix. I don't think these have a divided clock. They get 50MIPS at 50MHz >so they can't be dividing the clock can they? Must be something like 4 >parallel paths running simultaneously. All microprocessors have clock divider. The microinstructions have to more stuff around internally during a normal instruction cycle. >I can try and avoid noise but the only way to know how much of a problem it >will be is by trial and error. Can someone point me at a good source of >information. I have Art Of Electronics (lent out at the moment tho so can't >look), is it's section on noise any good? Can anyone recommend a good source >of information on topics related to analog data aquisition such as EMI, >grounding, filtering etc. Check the Analog Devices app-notes. >Aliasing is something I don't quite understand. I know vaguely how it works >in theory but am having trouble linkling the theory to practice. I know it >is related to frequencies in the signal and the sampling rate. I can see how >it works in a perfect audio system (i.e. the only frequencies are those of >the audio (no noise)) but have trouble linking that to a knob box. The simple answer is that EVERYTHING above 0.5 x the sampling frequency is error to the ADC. This includes any signal power above this frequency. Suppose you're sampling a pure sine wave, with 3 samples per period. Then you'll get only 1 sample per period of the 3rd harmonic. If the fundamental is 1 V p-p and the harmonic, say, 0.1 V p-p, then that 3rd harmonic can contribute as much as a 10% error, depending on the phase shift of the sampling. If you set an anti-aliasing filter at 1.5x the fundamental (also in this case at 0.5 x the sampling rate), then you'll only be sampling the fundamental and not the overtones. The cost of this is some predictable distortion, but it's at the very highest end of the signal spectrum where there's problem little power anyway. If you object to this loss of signal spectrum, then you've got a crappy design for your system: increase the ADC rate and still include an anti-aliasing filter. Good design will sample at 10x the highest frequency required (e.g., 10 ksps for 1 kHz), with an anti-aliasing filter at 2x the frequency (e.g., 2 kHz 3dB pt for 1kHz max freq.). In the case of the pots, you might get all kinds of 'scratchy' bouncing on movements you want to filter out anyhow, and you can count on problems at 60 Hz and its overtones. I can conceive of no reason why any rational person would want to include pot-turning frequencies any higher than 20-30 Hz. A low-pass filter at 30 Hz will kill your 60 Hz noise, any spikes from turning, digital noise and everything else you don't want. What does it hurt? You get a few milliseconds lag in the PIC between the actual movement and its response. Big hairy deal. You need to look at your pot signal on a scope or through the ADC. Why can't you do this? ================================================================ Robert A. LaBudde, PhD, PAS, Dpl. ACAFS e-mail: ral@lcfltd.com Least Cost Formulations, Ltd. URL: http://lcfltd.com/ 824 Timberlake Drive Tel: 757-467-0954 Virginia Beach, VA 23464-3239 Fax: 757-467-2947 "Vere scire est per causae scire" ================================================================