Why spend AU$100-200 for a precision rotary encoder? Buy a (US)$3.00 mouse,
rip out the little wheel and slot it turns in (an optical interrupter) and
center punch and drill a hole just the size of the wheels shaft in the end
of the pot shaft. The interrupter is an led and a photodiode. See
http://www.national.com/an/AN/AN-681.pdf page 2
for an example of how they work.

James Newton, webmaster http://get.to/techref
(hint: you can add your own private info to the techref)
mailto:jamesnewton@geocities.com
1-619-652-0593 phoneÊ



-----Original Message-----
From: pic microcontroller discussion list
[mailto:PICLIST@MITVMA.MIT.EDU]On Behalf Of Thomas Brandon
Sent: Wednesday, September 22, 1999 4:40 PM
To: PICLIST@MITVMA.MIT.EDU
Subject: Re: A/D Challenge


Unfortunately I don't want large quantities and they ain't cheap in small
quantities.

A FPGA based solution was something I had considered. A small FPGA could
handle 8 or even 16 rotary encoders and memory map their values. This ould
be one way to go but an FPGA would cost about as much as my ADC and the
rotary enc's would cost about AU$100-200 more. Also, I have no FPGA
experience.

I was more reffering to using the PIC to decode them when they were
multiplexed with other functions would be hard. However I haven't looked at
the pulse width of the average rotary enc. so a Scenix might be able to poll
them fast enough. It's still less expandable than a knob based solution and
that's my major worry. A 8 channel ADC becomes 15 channel with one AU$1
4053. It costs about AU$160 to upgrade a 8 rotary enc. box to 16.

Thanks anyway,
Tom.
----- Original Message -----
From: Dennis Plunkett <dennis@RDD.NECA.NEC.COM.AU>
Subject: Re: A/D Challenge
> I have not been watching this tread much, so my comments may be of little
> use. But it seems that a rotary encoder (Cheep to make in large
quantities,
> just look at a mouse, it has two!) can be multiplexed, as you are only
> looking for a change in state of sine, then you look at the cosine to see
> which way it is going. This can be done with simple logic, you will have
to
> poll at a pre determined rate applicable to the maimum rate of change *2 *
> number of ports.
> You can take this one setp further and put this into a simple FPGA, thne
> just reas out the real values.
>
> Dennis