>arrangements (unlimited breakpoints, complex breakpoints, no stack usage, >no code space usage, data breakpoints, trace, timing, break when the stack >over/underflows..). Wrong information when somebody in the silicon forgets to disable TMR0 updates during data transfer Remember that one? Hope that doesn't happen ever again. Andy ================================================================== Eternity is only a heartbeat away - are you ready? Ask me how! ------------------------------------------------------------------ andy@rc-hydros.com http://www.rc-hydros.com - Race Boats andy@montanadesign.com http://www.montanadesign.com - Electronics ==================================================================