Any (generic) LP RAM parts that I have used have had two low power
modes, one of them only requiring /CS to be held high when Vcc falls
to 3V. That makes it much easier to do battery backup.

I'm not an ASCII artist so I'll try and describe it in words.
The RAM is powered via (schottky) diodes from either the 3V battery
or 5V, depending on which is higher.

The /CS pin has a pullup resistor to the RAM Vcc (Vbat) pin. Also
attached to /CS is the collector of an NPN transistor. The base
of that transistor is tied to the 5V supply through a resistor. The
emitter is connected directly to the output of your PIC, address
decoder or whatever.

When normal system power is present, the transistor will turn on any
time that the emitter is pulled low, pulling the collector down and
selecting the chip. When system power goes away, the base drops to 0V
with the supply so the transistor remains off and the pullup on the
collector holds the /CS pin at Vbat (low power mode).

It's cheap, fast, doesn't cost much noise margin and works with quasi
ports on 8051's.

Steve.
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Steve Baldwin                Electronic Product Design
TLA Microsystems Ltd         Microcontroller Specialists
PO Box 15-680, New Lynn      http://www.tla.co.nz
Auckland, New Zealand        ph  +64 9 820-2221
email: steveb@tla.co.nz      fax +64 9 820-1929
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