>   Without knowing the details of the design, I would take a hard look at
>how large a FIFO you really need. For example 16 Bytes could easily fit in a
>smaller CPLD.

16 bytes each direction would be the bare minimum.  64 would be more
reasonable.  I only use 150 of the 256 most of the time right now.

>   Believe me, I could use the work right now but unless board space is
>`mission critical' compared to cost, I think the existing design is more
>cost-effective depending on how much you are paying for the 7201s.

It's a layout problem.  Half the board space (2-sided) goes to routing the
traces between the two FIFOS, PIC, and PC/104 bus.  The chips use only a
small fraction of that area.

Andy

==================================================================
Andy Kunz               Life is what we do to prepare for Eternity
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andy@rc-hydros.com      http://www.rc-hydros.com     - Race Boats
andy@montanadesign.com  http://www.montanadesign.com - Electronics
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