Can you kind of mix the two ?

1) Master normally sets request line as an input and Master has to check
request line within certain intervals.

2) Slave wants data so it takes request line high and holds for a given
period of time (longer than the interval between master polling).  At the
end of that time, it releases the line.  Master checks and sees that the
request line is high.  Master waits for the line to be released.

3) When the slave releases the line, the Master pauses for a few uSeconds
and makes the request line an output and uses it for a clock line to clock
data to the slave. After the master has clocked out data, the master sets
the request line to input and goes back to other tasks periodically polling
the request line.

Maybe something along these lines might work but you have to watch for line
contention.

It would be timing dependent, but not frequency dependent.

Eric

>
> I guess I could also do this async. with only a request line and a data
> line, but then I have to slow things down lots to account for the
different
> clock speeds and possible drift in clock frequencies (Slave PIC is using
an
> internal osc, host a crystal at a different frequency.)
> I'd appreciate suggestions, links, or even cries of "fool, look
elsewhere!"
>
> Thanks,
> Evan Short.
>
> --------------------------------------------------------------
> Evan Short - Electronics Engineer
> Ferrari Gestione Sportiva - Maranello, Italy
> --------------------------------------------------------------
>
>  << File: ATT00001.htm >>