I want to set up a memory system to allow two PICs to exchange several data
values.  I am considering using an SPI memory chip along with the necessary
switching to make sure only one PIC tries to access the memory chip at a
time.  My reason for considering this scheme is that each PIC needs to spend
most of its time tending to some very time-sensitive tasks, so direct
communication between the PICs is difficult/impossible.

My question:
Is there such a thing as an SPI DRAM?  The closest thing I have found so far
is an SPI FRAM, which is fast enough is limited to only 10^10 read or write
accesses.  SPI EEPROMs are even slower and have even fewer read-write cycles
before they experience unacceptable errors.

My second question:
Am I re-inventing the wheel?  Maybe there's some sort of single chip
solution for what I'm trying to do, like maybe a 256 byte dual ported SPI
chip?

thanks

-Nicholas