Here's a cross post by Jim Granville from the Atmel list fyi.


RM

_________________________________________________

Stefan Wimmer wrote:
>
> >> Anyone more knowledgable than I on the AVR series - would you like to
> >> comment on this device by Fairchild ?
>
> Looks a lot like a COP.

It's to a COP, like a 8051 is to 8048.
The COP is slow, and works on A only, sim to 8048.
The ACE is FAST, and has many DIRECT memory opcodes, more like C51's.
The [X] register is longer, on ACE, so you get to DATA.EE.SFR.CODE all
with one pointer.

> Unfortunately Fairchild doesn't give any prices in the webb page, but 16
or
> 18 pin COPs (OTP, not Flash/EE!) can be had for under $1.

http://www.fairchildsemi.com/pf/AC/ACE1202.html
has the price at $1,33 5K, for the 2K, 1202, on SO8 or SO14.

Our summary is :-

The ACE core is a nice embedded micro controller - we
are so impressed, we are working up tools support right now!

This is the Road Map info
ACE 1101   1K  64EE 64R 8 TSSOP           Now
ACE 1202   2K  64EE 64R 8/14SO            Now

ACE 2101   1K  64EE 64R A/D               Planned
ACE 1001   1K  64EE 64R ??                Planned
ACE 2202   2K  64EE 64R A/D, 12V          Planned ( yes, 12V )
ACE 2404   4K  128EE 128R A/D UART 24io   Planned


We will offer a Smart Assembler, and ISP support.
Assembler Package ( in beta ) will allow
* C51 mnemonics ( subset )    -> ACEx binaries
* PIC mnemonics ( superset )  -> ACEx binaries
* ACE mnemonics ( superset )  -> ACEx binaries
* Named BOOLEAN variables, via defbit BitName


- To C51 users, it is a Tiny51
- To COP8 users it is a TurboCOP8
- To PIC users, it is PageLESS (!), adds CARRY Opcodes, FLASH, INTs...
- To AVR users, it offers BOOLEAN power, less PAGE/Segments, Lower
Power, Affordable ICE.
  ( but keeps the 1 MIP/MHz peak performance )
- To ALL users, it offers TSSOP8, SO14 packages


Features Summary
~~~~~~~~~~~~~~~~

- 1 Clock / Byte CPU memory bandwidth ( 1 MIP / MHz )
- Extended opcodes, so you can rotate Memory thru carry etc
- Direct Memory Opcodes, for INC.DEC.MOV etc
- Full memory 'long' Index ( includes CODE, EE, RAM, Ports )
- Index with offset opcodes, on 1202 & above
- Boolean Opcodes, and 64 Bytes of RAM, 64 EEPROM
- Efficent DATA access
- separate 16 Byte Stack
- NO PAGE nasties ( for the PIC grumblers )
- NO Resource Allocate 'gotchas' ( for the AVR grumblers )
- Smallest devices are not crippled, but have EE, RAM, INTs, Index
opcodes

Relative to other BASE LINE uC, ACEx offers ISP with
a true _controller_ core.

wrt Base Line PICs :
~~~~~~~~~~~~~~~~~~~~
= FLASH isp VS OTP
= 64 Bytes RAM vs 25 Bytes
= 16 Bytes of Stack vs 2 levels
= EEPROM 64 Bytes ( PICs are not so baseline with EEPROM )
= Efficent EEPROM access, EE Bit Read
= Full CARRY maths
= Efficent CARRY opcodes
= No PAGE nonsense
= Table Lookups, and in all memory segments
= Efficent 1 byte short jump
= Code highly portable across ACExx
= Smart Timer & INTERRUPTS
= Compensated on Chip Oscillator - 5% Vcc spread


wrt Base Line AVR's.
~~~~~~~~~~~~~~~~~~~~
= 64 Bytes RAM (A,X,SP) vs 32
= 16 Bytes of Stack vs 3 levels
= Full memory BOOLEAN Variable access ( < 2047 Bits )
= Assembler allows Named Boolean VARs
= Easy resource allocation, no gotcha's
= 1 Byte Short Jump
= Efficent EEPROM access, EE Bit Read
= Much more efficent DATA Access
= Much cleaner memory / Data
= Smaller code than AVR ( many 1 byte opcodes )
= 1 MIP per MHZ speed
= Compensated on Chip Oscillator - 5% Vcc spread, vs 400K<->1400K (!!)
= 125 degree spec, and 10^6 programming cycles
= Table Lookups, and in all memory segments, All devices
= Rotate any MEM thru CARRY
= Icc at 5V 1.3mA,1Mip vs avr 3mA,1Mip
= Icc at 3V 0.48mA.1Mip vs avr 1mA, 0.4Mip

wrt C51s, ACE is a credible subset :
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
= EEPROM 64 Bytes
= On Chip Oscillator - 5% Vcc spread
= FLASH isp VS OTP ( tho we do ISP for 89X051 )
= Rotate any MEM thru CARRY
= Removes Interrupt Priority
= Removes _all_ REGISTER opcodes
= Replaces with 1 Byte 32 ShortJumps
= Some BIT opcodes removed : AND,OR,JBC,JNB
= Keeps MOV C,Bit MOV Bit,C, JB, JC, JNC
= Bit syntax addresses up to 2047 bits
= Removes MUL, DIV, PUSH, POP opcodes
= Replaces MOVX, MOV @Ri, MOVC with MOV A,[X]
= long X Pointer gets to ALL memory, DATA,EE,CODE



Jim G.
--
======= Manufacturers of Design Tools for uC and PLD  =====
* IceP2051 - Full Speed ICE, for 1K,2K,4K 20 Pin FLASH controllers
* OptoISP  - Safe, fast In System Program of 89S, 90S, 17C devices
=> http://www.DesignTools.co.nz/winner51.htm  for highlights