Michael Rigby-Jones wrote: > > > > > Hi all > > > > Ive got a circuit design that uses 4 or 5 TTL chips to take in > > > > 16 address lines to enable various peripherals. > > > > Im looking to reduce the IC count to 1 chip. > > > > Ive heard about pal,gal and pld chips but have no idea how > > > > to use them or program them. Would these chips suit the job > > > > and if so where do I learn about them? > > > > I'd use a Scenix SX18 chip. Quick, dirty, cheap. > > > I'd say it depends totaly on the speed of your circuit. If this is the > address bus of a microcontroler/microprocessor(and it sounds like it), then > even a 50Mhz Scenix may give an unnaceptable latency. With 16 address lines > to read and process, I would think that you would be looking at a latency in > the microsecond region which is way too slow unless your micro is running at > much less than 1Mhz. Certainly it won't come close to the speed of a GAL, > which is in the 10's of nanoseconds range. If you want more address lines, you can use a SX28. Each instruction takes about 20ns, and you are in control of what comes out the ports, so you could have a glitch-less glue chip. I'd say a few hundreds of ns would do it. I agree about the speed of the GAL - it is real fast. It is just a pain in the butt (IMHO) to implement and develop on for a beginner. -- Friendly Regards /"\ \ / Tjaart van der Walt X ASCII RIBBON CAMPAIGN mailto:tjaart@cellpt.co.za / \ AGAINST HTML MAIL |--------------------------------------------------| | GSM Technology for Positioning and Telematics | | Cellpoint Systems SA http://www.cellpt.com | | http://www.wasp.co.za/~tjaart/index.html | | WGS84 -26.0124 +28.1129 Voice +27 (0)11 2545100 | |--------------------------------------------------|