I have a circuit in which I use the PIC IO pins to clamp a
       voltage at the pin to VDD at very low current.  The current
       into the pin is about 3uA.  I've used two methods and find a
       difference in operation that I can't explain.  The pins are
       RA0,RA1 on a 16C622 and the pins are configured as "digital"
       (comparator is disabled).  VDD is 3.0V.  See the below
       simplified circuit:

                    3.3MEG    |
       13VDC >-----/\/\/\-----|RA0 (input or output high)
                              |


       Method 1. Drive the pin as an output high.  3uA current flows
       into the pin to VDD through the P channel FET (FET conducts in
       either direction).

       Method 2. Set the pin as an input.  3uA current flows into the
       pin to VDD through the protection diode.

       My measurements show that the pin sits at about VDD with #1,
       and .4V above VDD with #2.

       I drive two pins each with about 3uA current.  The total
       quiescent current is 6uA higher using method #2, why?

       (Note: 6uA is 20% of my total current, so it does matter).

       Thanks,
       Jim Hartmann