Hi Peter,

What about using the 16C63's CCP module to generate 50% duty cycle PWM at
as high a frequency as possible? I am not familiar with the CCP modules, so
I took a quick look at the datasheet. It wasn't obvious to me what the
maximum frequency is because I can't see where it tells you the minimum
allowed resolution. It would be great if you could set it to 2 bit
resolution (and give it either 25% or 75% duty,it might work) or 3 bit
resolution (and give it 50%). I looks to me as if you could get a few
100kHz that way.

Sean


At 03:31 PM 7/22/99 +1000, you wrote:
>I am trying to modify an existing data logger that uses a 16c63 and an
>AD7890.
>
>The ADC needs an external clock signal to do the conversion which at the
>moment is generated in software on a normal output pin. My problem is that
>because the signal is generated in software I can't do anything during that
>time and I would also like to increase the frequency of the signal to reduce
>the conversion time.
>
>The AD7890 has a max frequency of 2.5Mhz and the oscillator driving the PIC
>is at 4.9152Mhz, so I can't use the osc. directly.
>
>I would like to have a freq of at least 1Mhz. Am I dreaming or is this
>possible preferably without external components as there is no room on the
>existing board design.
>
>Peter Graham
>
>
>Attachment Converted: "c:\program files\bear
access\winba\eudora\attach\Generating clock signal"
>
|
| Sean Breheny
| Amateur Radio Callsign: KA3YXM
| Electrical Engineering Student
\--------------=----------------
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