Greg Brault wrote: > I wanted the design to use the less space possible, less construction > needed, etc.. So using 1 pic compared with 10 scrs, or 1 pic compared > with a D flip flop with a 10 input OR gate... well, i chose the pic :) > Greg One of the issues here has been whether the Quiz Master is "fair" (i.e. has no builtin baises that a knowledgable contestant could exploit) or not. Priority encoders and sequentially bit scanned PIC ports aren't "fair" (And most fiddling with the machinery 'in front' of them won't make them 'fair', just more uncertain). N-Flops and the whole class of syncronizers ARE 'fair' in this sense. I was just making the additional point that these ALL would fail in a VERY SMALL number of close CASES (and that this number could never be ZERO). [For reasons I don't think I could 'prove' in general] A PIC port is 'fair' in the above sense if we read it IN PARALLEL as fast as possible ( or actually at any speed) and, when it's (e.g.) NON-zero we then sort out the (hopefully one) winnner. A 'tie' is of course possible, and we can calculate it's probability, in much the way we could with any realizable (unbiased) synchronizer arrangement. BUT it would be a "fair" tie. Price or size or power (or color) is another issue. R. Martin