Hi Greg,
a long time ago I interfaced DRAMs to a 65xx-CPU, refreshing and accessing
it without additional hardware. Take a close look at the data sheets (timing
diagrams) and use CAS-before -RAS refresh. The refresh rate depends on the
DRAM size: the bigger it is, the more time you have.
It may make things easier to use parallel latch chips for data, like the
HC573.
Important: put suitable 100n caps near to the supply pins, and use resistor
arrays in series with address and data pins (maybe 33 Ohms) if many DRAMs
are used; this limits the current spikes generated when many line switch at
once.

Cheers, Roland Koehler.