From: Sean Breheny <shb7@CORNELL.EDU>

>Hi Russell,
>I have worked with several micros but the PIC has definately been
the one I
>have done the most work on. SO, as a result, I have a question about
>typical micrcontroller architecture: how many microcontrollers
operate at a
>constant number of cycles per instruction (except branches)?
New Z8+ core has constant time for ALL instructions including
branches/Jumps.
Or so the manual says. A few don't make sense but I havenm't yet
written code to see if they are lying :-).
eg CALL should take longer but ...
Most other micros have well defined but variable times depending on
op code etc.

>I have also seen some of the MIPS architecture (which, I guess, is
as flat
>RISC as it gets) but I wonder how many micros in the same class as
the
>PIC(available in flash and with a small pin count and built-in
>peripherals), but which include the features that you want (a real
stack,
>linear addressing, etc.), also have the constant number of cycles
per
>instr? Yes, I know that the SX and AVR do, but they don't have a
real stack
>and linear addressing, do they? (I am familiar with the SX, but not
yet
>with the AVR)

Z8+ comes surprisingly close. Addressing is paged but in a much more
graceful way than PICs. You can use various length instructions to
address successively larger addrss areas ot use page pointers.




RM