Sean,
1)      if another interupt (WDT, external pin change, eeprom write)
completes then the PIC will wake again. (this would include pending
interupts caused during an A2D service interupt)   If you RTFM then you
wil find more relevent answers.

2)      you must provide adequate sample time for the internal A2D
capacitance to aquire the input voltge, this is lengthened for high
resistance path between A2D & sense voltage.   Rapid sequential scaning
of multiple chanels will provide some charge sharing between the sampled
chanels.

3)      you must enable the on chip A2D oscilator.

4)      the voltage reference for the A2D is often the PIC's VCC, is this
stable to within significantly less than your error value ?

5)      for long term stability it is worth noting that a 7805 regulator can
significantly alter it's "regulated" output voltage as it's temperature
changes, good heatsinking will minimise this.

Sean Breheny wrote:
>
> Hi All,
>
> Thanks in advance for any help you can give me with a problem I am having:
>
> I am trying to use the ADC on a 16C71 and I am getting an error of as much
> as 2 LSB (when the datasheet says +/- 1 LSB max). I am measuring the
> voltage directly between the ADC pin and the PIC's Vss pin and the output
> code seems to be off. I am waiting about 800 uS from the time I enable the
> ADC until I begin the conversion, and the output impedance of my source is
> 2.2K
>
> Now as to the reason why this is entitled "SLEEP": AS recommended in the
> datasheet, I am placing the pic in sleep mode during the ADC,using the
> internal RC oscillator for the ADC. My normal oscillator element is a 4MHz
> xtal with 20 pF load caps. When I observe the pic's oscillator pins with my
> scope (about 20pF loading with my x10 probe),instead of seeing the
> oscillator exponentially decay to zero during sleep (as I would expect), I
> see the DC level increase slightly and the the amplitude remain constant.
> This region of the waveform is about 50 uS long after which there is a
> small glitch and then the DC level returns back to the same as before
> sleep. Is this normal for sleep mode? I thought the whole idea was to
> disable the oscillator (and other internal PIC circuits) to prevent digital
> switching noise! Perhaps the xtal's Q is so high that it won't even begin
> to decay in only 50uS? (This is my guess, since 50uS is only a few 100
> cycles at 4MHz,BUT if this is the case,are we loosing some of the benefit
> of sleep mode?)
>
> I know that 2 LSB error isn't that bad,but in my case,it is really annoying
> because the actual ADC count gets multiplied by 7 before being displayed on
> an LCD display. SO, if I calibrate it to be correct in one portion of the
> scale, I get as much as 14 or sometimes even 21 counts (after being
> multiplied by 7). Yeah, I know,an 8 bit ADC on a ucontroller is not a
> really precision device and multiplying by 7 is making things worse,but I
> think I could live with 1 LSB of error more easily. MORE IMPORTANTLY, I
> want to make sure I am not doing something dumb with the sleep mode.
>
> Thanks,
>
> Sean
>
> |
> | Sean Breheny
> | Amateur Radio Callsign: KA3YXM
> | Electrical Engineering Student
> \--------------=----------------
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