Paul asked:
>   Now what I haven't twigged to, is how you synchronise the LFSR in
> transmitter and receiver, or why you don't need to?

I think I may be wrong in calling it an LFSR; there isn't actually any
feedback.  Rather, the shift register serves as a delay line for a finite
number of previous samples.

What the scrambler actually does is provide a linear function of the
current bit with earlier scrambled bits; a shift register is used for
delay.  For instance, in Bell 212A (1200 bps), the scrambler generates:

        ds [n] = d [n] xor ds [n-14] xor ds [n-17]

and the descrambler generates:

        d [n] = ds [n] xor ds [n-14] xor ds [n-17]

where d [n] is a dibit (pair of bits to be encoded into one symbol) for
time n, ds [n] is the scrambled dibit for time n, and the shift register
holds the last 17 scrambled dibits in ds [n-1] through ds [n-17].

Note that in the event of an error, the descrambler will take 17 symbols
to resynchronize with the scrambler.

At the start of the connection, the 17 symbols needed to sync up are
part of the modem training sequeunce.