Byron A Jeff wrote:
> 
> >
> > Byron A Jeff wrote:
> > >=20
> >
> > >=20
> > > And unless the SX28 has SPI hardware built in, the serial loading of op=
> > codes
> > > is going to dominate timewise over the execution time of the bytecodes =
> > anyway.
> >
> > At 50 MIPs I think it could compensate for the fact that it will be bit-b=
> > anged.
> 
> It will. However I don't think you'll get the full 10 to 15 Mhz available
> bandwidth bit banging.

If I get 1 Mtip (million token instructions per minute), I'll be very happy. 
I was thinking of 'pipelining' as many tokens as possible. Basically I'll 
just load, say 10 tokens instead of 1. If the program branches out of the 
cached tokens, I will have to reload.

I was thinking of running a reasonably transparent ISR in the SX that will 
make the RS232 comms available as RX and TX registers 2 or 3 buffers deep each.
Maybe it will be worth implementing a task despatcher system in the SX with 
multi-threading. Hmmmm. Hello semaphores, goodbye sleep ;)

> >
> > > I can delay figuring this out for folks who are willing to agree not to=
> >  sell
> > > and for now, not to distribute. It'll give you a rather large boost in =
> > trying
> > > to get this done.
> > It surely will. The development is for a commercial application however, =
> > so=20
> > we'll have to develop it ourselves so we can own the code.=20
> 
> Understood. However you could possibly examine my bytecode set and design
> decisions to get a basis for designing your own.
It will definitely help me. If you don't mind, I'd love to have a peek.
 
> Pick away.
I started in the first paragraph already. Hehehe.

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