There are non-looped techniques that can increase the pulse timing resolution to 2-tcyc and 1-tcyc. 2-tcyc: ------- Starting off with a blank chunk of memory, you can repeatedly sample an I/O bit and record it's state like this: btfsc ioport,iob bsf ram0,0 btfsc ioport,iob bsf ram0,1 btfsc ioport,iob bsf ram0,2 btfsc ioport,iob bsf ram0,3 btfsc ioport,iob bsf ram0,4 btfsc ioport,iob bsf ram0,5 btfsc ioport,iob bsf ram0,6 btfsc ioport,iob bsf ram0,7 btfsc ioport,iob bsf ram1,0 etc... I had to use this once to capture a very fast pulse stream. The block of ram was made as large as possible. A trigger event determined when the data was to be accumulated. Then once the data was obtained it was analyzed. 1-tcyc: ------ A very short single cycle resolution buffer can be made with an I/O port. Here's a variation to something Andy Warren had suggested a long time ago (Andy's captured 7 samples). Suppose your input is RB7. Make RB0-RB6 outputs. You can obtain 16 consecutive samples like so: rrf portb,f rrf portb,f rrf portb,f rrf portb,f rrf portb,f rrf portb,f rrf portb,f rrf portb,w ;first 8 samples in W rrf portb,f ;This sample gets stored in C rrf portb,f rrf portb,f rrf portb,f rrf portb,f rrf portb,f rrf portb,f rrf portb,f The last seven samples are in portb bits 0-6. The 17 sample is sitting in RB7, but you can't save it without destroying the other samples. Now, if you're willing to make a little compromise. Then you can combine these two ideas and get 8 samples for every 9 instruction cycles: rrf portb,f rrf portb,f rrf portb,f rrf portb,f rrf portb,f rrf portb,f rrf portb,f rrf portb,w movwf ram0 ;Store last 8 samples in RAM rrf portb,f rrf portb,f rrf portb,f rrf portb,f rrf portb,f rrf portb,f rrf portb,f rrf portb,w movwf ram1 ;Store last 8 samples in RAM Etc... Scott