Thanks Paul,

I never tried the two instruction method till date since I was going by
the
book. Now I will start using it and save the 2 instruction space.

Being a member of this list has been a great help.

Thanks once again.

Pailoor

Paul B. Webster VK2BZC wrote:

> Ravi Pailoor wrote:
>
> >         MOVLW   k
> >         TRIS    PORTX
> > works well with the 5X series, but I believe this topic is for 16C63
> > as the subject line indicates.
>
>   Yep.  It works *real well* for the 16C63 series as well.  In fact, all
> experienced programmers know that for *most* purposes, it is still the
> *optimum* way of controlling TRIS.
>
> > For the 14 bit core you need to use the following,
>
>   Wrong expression.  Not "need to", but you "may *optionally*" use the
> four instruction sequence.  Or you can use BSF or BCF on individual TRIS
> bits or IORWF or ANDWF.  It's very versatile *but* some people have
> suspicions as to whether these *might* *in some circumstances* "glitch"
> like thse operations do when applied to the PORT register.
>
>   And in fact, much of the time all you want to do is set up a TRIS
> register to a pre-determined state, so the TRIS instruction is best.
>
> > If I understand PICmicro instructions correctly, the TRIS is an
> > INSTRUCTION in the 5X series and REGISTER in the 14 and 16 bit cores,
>
>   Again, the wording is "the TRIS register is accessible only by special
> INSTRUCTION in the 5X series but *ALSO* as a *general-purpose* register
> in the 14 and 16 bit cores"
>
>   I'm sorry if you are confused, but the fact is Microchip deliberately
> set out to confuse you in the documentation.  I surmise it's a very
> personal matter regarding some, obviously senior, design engineer within
> MC who has a "bee in his bonnet" about this and the rest are simply
> forced to play along with the farce.
>
>   It demonstrates insensitivity to the users (designers) but well,
> they're a big successful company (with undeniably good products) so they
> can *afford* such little eccentricities.
> --
>   Cheers,
>         Paul B.

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